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This is a practical problem of (combinatorial) logic circuits where a reduced logic function is calculated by simplifying the function obtained from a truth table of 4 inputs and 2 outputs using Karnaugh diagrams. The table is built from the operating data of the problem and is constructed step by step. Finally, the circuit corresponding to both outputs is implemented with logic gates. Made by Javier Luque (FdeT) http://fdet.es